Design Enablement—Design it once; design it right.
The proliferation of specialty ICs in consumer and infrastructure electronics over the last decade has catalyzed the convergence of analog applications with customized semiconductor technology from foundries such as TowerJazz. Other than the obvious design-to-specification requirement, three key requirements come to the forefront: performance, time-to-market, and manufacturability.
The days when design teams could afford the luxury of evaluating tens of prototypes on a single shuttle are long gone, and the first-time design success approach, such as in the “Design it once; design it right” slogan, has taken a firm foothold in the industry. TowerJazz has been a leader in enabling the realization of this mantra. We provide a design enablement platform that complements our sophisticated technology and makes this possible. This platform includes process design kits (PDKs), IPs, reference flows and dedicated design services for our process technologies.
Keys for achieving the goals of performance and optimization are the accuracy and scalability of the compact models. A compact model is essentially a set of analytical equations that describe the electrical, electromagnetic and thermal behavior of a semiconductor device, implemented in a SPICE-like simulation tool. A good match between model and silicon yields an accurate prediction of the circuit level figures-of-merit, such as the gain of low noise amplifiers (LNAs) and the efficiency of buck converters.
Likewise, a model that can be accurately scaled across different sizes enables the designers to optimize the performance of their circuits. For example, in our unique scalable LDMOS model in the Power Management platform, the on-resistance can be continuously traded-off with the breakdown voltage. An often ignored linkage in some foundry models is related to the layout.
TowerJazz PDKs ensure that the layout generated from the parameterized cell (p-cell) is closely linked to the model used in the schematic view. Additionally, the advanced parasitic extraction capabilities allow for custom layouts and routing effects to be accurately simulated and optimized before tape-in.
Once the design has been conceptualized on a schematic canvas, it is the capability and flexibility of the design tools and support that determine how fast the layout blueprint (GDS) can be generated. At TowerJazz, in addition to the feature-rich PDK, we complement the offerings by supporting a comprehensive set of analog and mixed-signal design capabilities provided by our EDA partners. These can be as simple as providing p-cell options for dummy gates to improve matching and silicon-optimized automated guard rings for various types of device body isolation built right into the p-cell property GUIs. Physical verification decks can be efficiently set-up and run either through batch processing or an interactive form.
In recent years, TowerJazz has added a rich suite of reference design flows and online training webinars to help reduce the learning curve for new users of our technology, while guiding them on PDK-oriented tool configuration and usage. Guiding our customers from concept to tape-in is our world-class design support eco-system.
Our online customer portal is available 24/7. With this portal, one can access File Exchange, which allows you to search, view and download technical documents and design libraries.
Logged in, you can also securely transfer forms, design data and other files. In addition, our Design Support Engineers (DSEs) are available to accompany you from the initial phase through the entire design flow up to production ramp, providing unmatched customer service. At our Design Center, we have experienced designers who have unique insights into the capabilities of our technology, and can assist with consulting and designing blocks or entire chips.
The omnipresent drive to reduce costs in the semiconductor industry requires design teams to optimize their designs for variations in the manufacturing process as wells as forexternal factors such as temperature, voltage and ESD.
Over the last decade, TowerJazz has developed a rich suite of Monte Carlo modeling techniques to ensure that designs can be simulated and optimized at the extremes of process and key parameter variations. A target focus of the PDKs released last year was the modeling of 2nd order effects, such as substrate and safe-operating regime checks.
In addition, we have begun offering a unique solution for advanced ESD and power domain checking in our latest 0.13μm and 0.18μm products.
For more information on our design enablement offerings, please contact Ofer Tamir (firstname.lastname@example.org) or Samir Chaudhry (email@example.com).