Silicon Photonics and Advanced SiGe Technology for Optical Transceivers
Followed by a joint presentation with SYNOPSYS on SiPho and SiGe Design Enablement Tools
Overview
As the optical transceiver market moves from 100GBs to 400GBs and looking forward to future nodes at 800GBs and beyond, many complex analog components are required to assemble energy efficient and cost-effective optical modules.
Tower Semiconductor technologies currently form the backbone for many of these analog components. These technologies include high speed SiGe BiCMOS processes for Trans Impedance Amplifiers, Laser and Modulator Drivers, Clock and Data Recovery Circuits and now Silicon Photonics technologies for optical / electrical conversion on a highly integrated scale.
This talk will cover all of the latest advancements in Tower Semiconductor’s portfolio of foundry process offerings targeted at the optical transceiver market. Details on the most advanced process offerings currently in production along with a roadmap for new features and new technologies will be presented.
PIC design enablement with Synopsys OptoCompiler in Tower’s Silicon Photonics PH18 Process
The silicon photonics design tools have rapidly matured in last few years. Tower has partnered with Synopsys to provide a holistic design environment for their PH18 family of processes that is now in use for complex analog system design for the 100-800GB application space. In this talk, we’ll present a detailed overview of the PH18 OptoCompiler PDK, highlighting key features that help enable rapid synthesis of PIC. We’ll also present a reference design flow of a MZI PIC along with silicon validation results highlighting key simulation, layout and verification features of the OptoCompiler design platform.
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PRESENTED BY
Dr. Ed Preisler
Director of Technology Development, RF & HPA
Dr. Preisler has been involved with SiGe BiCMOS development since joining Tower Semiconductor in 2004 and has held the title of Director of Technology Development since 2012. He has served on the committees of the IEEE RFIC and BCTM conferences and as a member of the ITRS wireless roadmap bipolar device committee.
Dr. Preisler received a B.Sc. in Electrical Engineering from U.C. San Diego and a Ph.D. in Applied Physics from Caltech in 2003 with a thesis that focused on antimonide semiconductors for optoelectronics. After graduating he served as a post-doctoral researcher at the IBM T.J. Watson research lab working on crystalline oxides and high-K gate dielectrics.
He has authored or co-authored 32 papers in the field of compound and column IV alloy semiconductor processing and device development, and two book chapters on bipolar device physics and processing.
Joint presentation with SYNOPSYS presented by
Dr. Samir Chaudhry
Director, Tower Design Enablement
Dr. Chaudhry has been leading the Design Kit and Modeling activities for Tower Semiconductor since 2008. Prior to this, he led the SPICE modeling group at Jazz Semiconductor. His research interests include RF CMOS and statistical modeling. He has worked with the Compact Modeling Council in developing industry standard compact models for circuit simulation. Prior to joining Jazz, he was a Distinguished Member of … Read More»
Dr. Luis Orbe
Customer Support Coordinator, SYNOPSYS
Dr. Orbe is a member of the Customer Support Team with 5 years of experience coordinating the training programs and enabling customers. Prior to this, he obtained a PhD for his work on MidInfrared sensing and monolithic integration. His interests include PIC design for telecom as well as sensing applications.
