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ChipEx 2018 - Event Summary
May 01, 2018
Tel Aviv Fairgrounds, Israel
IS Americas - Event Summary
October 11 - 12, 2018
Hyatt Centric Fisherman's Wharf
San Francisco, CA, USA
Presentation Schedule
Don’t miss TowerJazz presentation:
13:00-13:30 | October 12
Hyatt Centric Fisherman's Wharf
Dr. Amos Fenigstein
"Future Trends in Imaging Beyond the Mobile Market"
Advanced Photonics IC Design Webinar - Event Summary
October 18, 2018
US/Pacific: 9:00AM
Asia/China: 4:00PM
EU/London: 9:00AM
Vehicle Connectivity Summit 2018 - Event Summary
October 18 - 19, 2018
Shanghai, China
Presentation Schedule
Don’t miss TowerJazz presentations:
Date: October 18
Hour: 15:30 - 16:10
"Specialty Analog Foundry Solutions for Connected and Automated Vehicles"
Dr. Amol Kalburge
User2User Europe - Event Summary
November 26, 2018
Park Hilton,
Munich, Germany
Presentation
Don’t miss TowerJazz presentations:
Track: IC Design (Physical Implementation and Verification)
Room: Salon Rumford
Time: 14:30
Adding DFM statistics for DRC rules to allow customer estimate error severances when negotiate DRC waive from the Fab
Presenting: Ronen Hasnes, PDK Section Head | TowerJazz
SURGE Herzliya - Event Summary
November 28, 2018
Dan Accadia Herzliya Hotel,
Herzliya, Israel
ICCAD 2018 - Event Summary
November 29 - 30, 2018
Zhuhai International Convention & Exhibition Center
Zhuhai, China
Booth: #112\113
Presentation
Don’t miss TowerJazz presentation:
November 30
11:00-11:20
"Analog Products in 65nm"
Qin Lei
APEC - Event Summary
March 17 - 21, 2019
Anaheim Convention Center
Anaheim, CA
Booth: #328
Presentation Schedule
Don’t miss TowerJazz presentations:
March 19, 2019 / Room 213B
08:30AM - 11:55 AM
Market Research: 65nm for Power Management IC - Sub 90nm PM Market Trends and Technology Advantages
Erez Sarig - Director of BD & Marketing PM/MS BU
GOMAC - Event Summary
March 25 - 28, 2019
DoubleTree by Hilton Hotel Albuquerque
201 Marquette Avenue Northwest
Albuquerque, New Mexico
USA
Mentor and TowerJazz Automotive Workshop - Event Summary
July 04, 2019
Newbury Berkshire UK
9:00 -15:30 EU/London
TowerJazz & Synopsys Webinar: Foundry Silicon Photonics Process - Event Summary
July 16, 2019
Join us at one of those hours:
10 am CET (For EU and Asia audiences)
10 am PDT (For U.S. audience)

One hour is planned for this webinar, including Q&A sessions.
HEART - Event Summary
August 18 - 21, 2019
San Diego, CA
USA
EPE’ 19 – ECCE EUROPE - Event Summary
September 03 - 05, 2019
Magazzini del cotone Conference Centre
Via Magazzini del Cotone
16128 Genova, Italy
Booth: #24
Presentation Schedule
Don’t miss TowerJazz presentations:
Wednesday, September 4th
Time: 17:15
Location: Austro Room
Integrated Power Management Future Trends and Solutions
SOI Consortium China - Event Summary
September 16 - 17, 2019
Pudong Shangri-La Hotel
Shanghai, China
Presentation Schedule
Don’t miss TowerJazz presentations:
11:20-12:00

Session 1 - Deployment
Panel Discussion: 5G Deployment in China
TowerJazz Dr. Paul Hurwitz will be taking part of the panel
15:30-15:45

Session 3 - RF Value Chain
Specialized RFSOI foundry technology solutions to support rapid new product development
By Dr. Paul Hurwitz
Japan SOI Symposium 2019 - Event Summary
October 30 - 31, 2019
Yokohama @ Landmark Tower, 25F
Yubinbango220-8125, Yokohama, Kanagawa Prefecture Minato Mirai, Nishi 2-chome No. 2 No. 1 2
TowerJazz Presentation
Don’t miss TowerJazz presentations:
Oct. 31, 2019 | 11:55 – 12:20

Worlds first open commercial silicon photonics process and PDK from TowerJazz,
Masanobu Kumazaki
User2User Europe - Event Summary
November 04, 2019
Hilton Munich Airport
Terminalstreet Mitte 20
Munich
TowerJazz Presentation
Don’t miss TowerJazz presentations:
November 4th, 2019
Track: IC Design (Physical Implementation and Verification)
Time: 14:00-14:30
Implementation of a Transistor-Level DSPF Extraction Flow for Power Integrity Analysis
By: Ronen Hasnes
Mentor and TowerJazz Automotive Workshop - Event Summary
November 06, 2019
Mentor Graphics (Deutschland) GmbH
Arnulfstraße 201
80634 München
Germany
Mentor and TowerJazz Automotive Workshop - Event Summary
November 21, 2019
Mentor, A Siemens Business
46871 Bayside Parkway
Fremont, CA
USA 94538
DesignCon 2020 - Event Summary
January 28 - 30, 2020
Santa Clara Convention Center
Santa Clara, CA
Presentation Schedule
Don’t miss TowerJazz presentations:
January 28, 2020 / Ballroom A
1:30pm - 4:30pm
Tutorial – Electronic/Photonic IC Design for 5G RF Applications
Samir Chaudhry - Director, Design Enablement, TowerJazz
James Pond (CTO, Lumerical)
Gilles Lamant (Distinguished Engineer, Cadence)
Pei-Der Tseng (Design Engineering Architect, Cadence Design Systems)
Rich Goldman (Head of Marketing, Lumerical)
Power Management Technical Webinar - Event Summary
April 21, 2020
16:00 pm Israel time / 15:00 pm CET
Free Online Webinar:
Leading Power Management Technology Addressing Market Trends and Requirements for Extended Power and High Voltage Applications
Autosense ONLINE 2020 - Event Summary
June 11, 2020
Online Presentation:
Automotive Radar - Technologies and Tradeoffs
Booth: #Online
Presentation Schedule
Don’t miss Tower Semiconductor ONLINE presentation
Thursday, June 11th - 4:30 PM BST
Liv e Q&A following the session
Automotive Radar: Technologies and Tradeoffs
Presentor: Dr. Amol Kalburge
The Sensors Show Virtual - Event Summary
July 22 - 23, 2020
Online event
Presentation Schedule
Don’t miss Tower Semiconductor ONLINE presentation:
July 23, 2020 - Online
TRACK B - Industry 4.0, Manufacturing & IoT
EDT - 18:10
CEST/PDT - 15:10
IoT Sensors for The Industrial and Harsh Environments
AJ ElJallad - Senior Sales Director, Tower Semiconductor
Autosens 2020 - Event Summary
November 17 - 19, 2020
On-Line
Detroit, USA
Presentation Schedule
Don’t miss Semiconductor presentation:
Tuesday, November 17th, 2020
Emerging Role of Foundries in Bringing High Value Analog Products to Market
6:00pm - 6:30pm Detroit
Online - https://2020.auto-sens.com/agenda/session/334233
NSREC 2020 - Event Summary
December 01 - 04, 2020
On-Line event - exhibit
December 1-3 – Manned Exhibits 11:30am-01:00pm EST
December 7-8 – Manned Exhibits 11:30am-01:00pm EST
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
Friday, 12/4/2020
Time: 14:30 - 15:00
Tower's online booth
Tower Semiconductor Aerospace and Defense Technology Solutions
Presenter: Mike Scott - Director, Tower Semiconductor USA Aerospace & Defense
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
Day 1 - Tuesday 23 March, 2021
Online
Time: 12:35
Under OLED and Under LCD optical fingerprint sensors
Dr. Amos Fenigstein | Senior Director of CIS Research & Development
Tower Semiconductor Webinar on Automotive Excellence – From Design to Volume Production - Event Summary
March 24, 2021
Online webinar
Session I - 9:30 AM London
Session II - 11 AM USA PST
Presentation Schedule
Don’t miss Tower Semiconductor presentation:
On-Demand - GROW
Enabling Tower’s Leading-Edge BCD and RF Technologies with Siemens EDA Design Tools
Samir Chaudhry - Director, Design Enablement
Ofer Tamir - Senior Director Design Enablement
John Stabenow - Siemens Industries Software

https://events.sw.siemens.com/en-US/realizelive/agenda?agendaPath=session/542767

CadenceLIVE Americas 2021 - Event Summary
June 08 - 09, 2021
Digital Event
Presentation Schedule
Don’t miss Tower Semiconductor presentation:
Wednesday, June 9th
10:50 - 11:20
5G / RF
Silicon-Validated RFIC Package Co-Design Using Virtuoso RF Solution in Tower Semiconductor's CS18 RF SOI Technology
Abstract: Established and emerging wireless and wireline applications such as 5G, WiFi and 400-800G optical networking are driving the demand for highly optimized RFIC solutions. Typical RF/mmWave design flows rely on the use of multiple EDA tools often sourced from multiple EDA vendors. This is inherently inefficient and often error prone leading to delays in getting a product to market. In addition, there exist multiple combinations of design tools and flows that prevent a foundry from providing a golden reference flow that can be used by a large portions of the design community. In this paper we present a silicon validated unified RFIC design flow using the Virtuoso RF. The design flow is based on a high-power SP4T switch design in Tower Semiconductor’s CS18QT9x1 foundry technology. RF SOI switch designs offer a useful test-case for the Virtuoso RF design flow as they require co-design and co-optimization of both the silicon and the package which is a key strength of this design flow. The design flow will be used to present a consistent modeling and simulation methodology. A seamless hand-off between PDK provided model, metal interconnect extraction within the p-cell, metal interconnect modeling outside the p-cell using EMX and Clarity, and the flip-chip package will be presented, while maintaining a single unified database that is used for tape-out. Silicon validation of key small and large-signal metrics will be presented highlighting the importance of the tight interaction between foundry Virtuoso PDK and package modeling using EMX and Clarity.

https://events.cadence.com/event/70560da2-887d-4795-a8bc-1dcad2d95ca6/websitePage:a4c8ddce-9c7a-43e1-a4f8-2333a8e328a2
Tuesday, June 8th
12:00 - 12:30
Silicon Photonics
Streamlined Foundry-Compatible Custom Photonic IC Design with Ansys-Lumerical, Cadence Virtuoso Environment and Tower Semiconductor's Foundry PDK
Abstract: The demand for silicon photonics technology is growing with popular applications such as datacom (5G), artificial intelligence (AI), sensing, quantum computing and autonomous driving due to the improved bandwidth, sensing capabilities and reduced power consumption of photonic devices. For a typical photonic integrated circuits (PICs) design, designers use a combination of silicon validated components from a process design kit (PDK) and custom components that adhere to the foundry process design rules. However, as component layout designs and simulations are typically performed using different design tools and platforms, it is challenging to maintain the components’ compliance with the foundry process, while creating accurate compact models for efficient simulations. With a goal to reduce the design cycle time of custom photonic components for PICs designs, this work demonstrates a design workflow that facilitates photonic component layout, device simulation, compact model generation, and circuit simulation. This workflow leverages design tools from Cadence and Ansys-Lumerical, and a foundry silicon photonics PDK (PH18) from Tower Semiconductor. In this workflow, physical layout is the initial step of a custom photonic component design, where the curvilinear/polygon-based component shapes are drawn in Cadence Virtuoso Layout Suite by using the PH18 PDK. To assist device simulations on a custom design, the PDK provides a process file that contains all the information necessary for Lumerical DEVICE Suite to directly generate a 3D model from the design layout and to simulate it accurately for the foundry process. The device simulation results can then be used by the Lumerical CML Compiler to automatically build high-quality optical compact models in both the Lumerical INTERCONNECT and Verilog-A formats for different stages of the PIC design flow.

https://events.cadence.com/event/70560da2-887d-4795-a8bc-1dcad2d95ca6/websitePage:a4c8ddce-9c7a-43e1-a4f8-2333a8e328a2
CDNLive Europe - Event Summary
October 19 - 20, 2021
On-Line
CICD China 2021 - Event Summary
November 01 - 03, 2021
Guangzhou, China
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
Date: Nov. 3rd, 2021 Wednesday
Venue: Huangpu Ballroom B, 1F, NARADA Hotel, Guangzhou
Time: 10:30-10:55
Sensing the World - Advanced CMOS Image Sensor Technology for 3D Imaging and Beyond
Speaker: Lei Qin, Vice President of China Operations, Tower Semiconductor Ltd.
2021 Annual Technical Global Symposium (TGS) – USA Session - Event Summary
November 16, 2021
Online - USA Session (9am Pacific)
2021 Annual Technical Global Symposium (TGS) – Europe / APAC Session - Event Summary
November 17, 2021
Online - Europe/APAC Session
9am Paris | 5pm Japan | 10am Israel
ICCAD China 2021 - Event Summary
December 22 - 23, 2021
Wuxi Taihu International Expo Center
Booth: #156, 155.
Presentation Schedule
Don’t miss Tower's presentations:
Dec 22, 2021
Time: 6:55-17:15
Venue: A6 Hall, 2F, Wuxi Taihu International Expo Center
Leading the Analog Ecosystem with Full Circle Value Creation
Speaker: Lei Qin, VP of China Operation, Tower Semiconductor Ltd.
Dec 23, 2021
Time: 10:20-10:40
Venue: Meeting Room 12, 1F, Worldhotel Grand Juna Wuxi
3D Imager Sensing the World
Speaker: Dasheng, China Sales Director, Tower Semiconductor Ltd.
OFC 2022 - Event Summary
March 06 - 10, 2022
San Diego, California, USA
Booth: #5417
Presentation Schedule
Don’t miss Tower's invited talk:
Thursday, March 10, 2022
3:30 pm

Part of Track D - Devices, Optical Components, and Fiber
Considerations for Silicon Photonics Process Technologies in a Commercial Foundry Environment
Dr. Edward Preisler, Director of Technology Development, RF & HPA
March 8-10, 2022
11:30am - 12:00pm

Synopsys booth #3215
Complete WDM Photonic IC design flow using the Synopsys PIC Platform for Tower PH18, including Juniper integrated lasers
SNUG SV 2022 - Event Summary
March 30 - 31, 2022
Online - Presentation
Wednesday, March 30th
Dr. Samir Chaudhry
Presentation Schedule
Don’t miss Tower's presentation:
Wednesday, March 30th
Time: 11:15 AM Pacific


Applications such as datacom, sensing, autonomous driving, and computing are driving demand for silicon photonics technology. For such Photonic Integrated Circuit (PIC) designs, both layout synthesis and physical verification demand innovative solutions to address unique challenges. For simulation and layout synthesis the Process Design Kit (PDK) should include accurate modeling of the active and passive devices as well as rapid synthesis capabilities so PIC designers can rapidly iterate to an optimum design. Once the layout is synthesized such non-traditional structures as “Curved lines / edges”, “Free angled edges” and “Acute angle corners” result in many false errors with traditional Design Rule Checking (DRC), and debug becomes difficult. On the other hand, there is concern about missing real errors with simplified screening algorithms. Additionally, optical devices provide a unique challenge for Layout Versus Schematic (LVS) verification related to wave-guide shapes and co-existence of electrical and optical pins. In this talk, we’ll present how these challenges are being addressed in an open foundry OptoCompiler PDK for design and simulation and the IC Validator platform for DRC and LVS, and are enabling PICs for a wide variety of applications.
 
For agenda and additional details - Click here >
SPIE 2022 - Event Summary
April 05 - 07, 2022
Gaylord Palms Resort & Convention Center
Orlando, FL, USA
Siemens U2U USA 2022 - Event Summary
May 03 - 04, 2022
Santa Clara, California
USA
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
Tue May 03, 2:45 PM - 3:15 PM PDT
The demand for SiGe foundry technology has grown with the rapid growth of popular wireline and wireless applications such as Optical networking, 5G, WiFi, GPS, IoT and Bluetooth. One of the key benefits of SiGe HBTs over CMOS is the ability to operate at higher power and frequencies, necessitating careful and comprehensive characterization and modeling of the Safe Operating Area (SOA) of the Integrated Circuit (IC) while ensuring the most optimized design. A key component of this goal relates to optimizing the design for performance and
reliability of the interconnect. In this paper we’ll present a methodology to comprehensively implement and test the mPower Analog Integrity solution for Tower Semiconductor’s SBC18 platform. A reference flow will be presented to highlight the correct and efficient use of the tool for EM/IR signoff by product teams.

Speakers:
Samir Chaudhry - Director, Design Enablement, Tower Semiconductor
Masanobu Kumazaki - Tower Semiconductor
Dr. Joseph Davis - Sr. Director of Product Management, Siemens EDA
 
For agenda and additional details - Click here >
PCIM 2022 - Event Summary
May 10 - 12, 2022
Nürnberg
Booth: #6-431
Image Sensor Europe – ISE - Event Summary
May 10 - 11, 2022
Park Plaza Hotel Victoria
London, UK
Presentation Schedule
Don’t miss Tower Semiconductor presentation:
May 10, 2022
Time: 10am
A CIS (CMOS Image Sensors) specialized foundry, faces challenges related both to the nature of the market applications using image sensors, such as the fast-growing ToF (Time of Flight) market, as well as to the rapidly changing technology trends in CIS technology such as wafer stacking. In order to best serve CIS customers, the foundry needs to be equipped with several process modules and capabilities along with certain flexibility and know-how. This talk will elaborate on these capabilities in the context of a variety of CIS applications.

Dr. Amos Fenigstein, Senior Director of CIS Research & Development

 
For agenda and additional details - Click here >
Siemens U2U Europe 2022 - Event Summary
May 12, 2022
Munich, Germany
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
May 12 - Ballroom Munich I + II, IC Backend Track 1
2:15 PM - 2:45 PM GMT
The demand for SiGe foundry technology has grown with the rapid growth of popular wireline and wireless applications such as Optical networking, 5G, WiFi, GPS, IoT and Bluetooth. One of the key benefits of SiGe HBTs over CMOS is the ability to operate at higher power and frequencies, necessitating careful and comprehensive characterization and modeling of the Safe Operating Area (SOA) of the Integrated Circuit (IC) while ensuring the most optimized design. A key component of this goal relates to optimizing the design for performance and reliability of the interconnect.

In this paper we’ll present a methodology to comprehensively implement and test the mPower Analog Integrity solution for Tower Semiconductor’s SBC18 platform. A reference flow will be presented to highlight the correct and efficient use of the tool for EM/IR signoff by product teams.

Ofer Tamir
Managing Director, Design Enablement, CAD and Design support
Tower Semiconductor

For agenda and additional details - Click here >
CDNLive SV 2022 - Event Summary
June 08 - 09, 2022
Santa Clara Convention Center
Booth: #S6
Presentation Schedule
Don’t miss Tower Semiconductor presentations:
June 8th, 2022
Category: SYSTEM DESIGN AND ANALYSIS
Celsius Thermal Solver for Transistor-Level Thermal Analysis
David Quon - Design Support Engineer
Tower Semiconductor
IMS 2022 - Event Summary
June 19 - 24, 2022
Denver, Colorado, USA
Booth: #4017
Presentation Schedule
Don’t miss Tower Semiconductor's presentations:
Monday, June 20 - as part of WMB: Advances in SATCOM Phased-Arrays and Constellations for LEO, MEO and GEO Systems
Dr. David Howard

Abstract:
As 5G and other novel satellite communication business models emerge, the need for accessible, more “affordable” technology has increased, that still meets technical requirements. In particular, the advancements in multi-element phased array antennas has helped reduce cost, and form factor, e.g. for receivers. In this talk, we will outline current and future foundry process technology, their figures of merit, and component demonstration.

For agenda and additional details - Click here >

Monday, June 20 - as part of WMC: Emerging MIT/PCM Based Reconfigurable Microwave Devices
Dr. Nabil El-Hinnawy

Abstract:
Chalcogenide-based PCM RF switches have undergone an impressive development since first being demonstrated in 2012. While initial demonstrations were aimed at exhibiting the record RF performance and massive RF system reconfiguration possibilities, more recent demonstrations have focused on developing and improving secondary metrics required for productization and mainstream commercial adoption. The technology is now positioned to become the first sub-10fs RON*COFF RF switch technology qualified in production high-volume manufacturing, placing an importance on understanding device fundamentals and how they translate to circuit implications. This presentation will discuss these topics as well as design considerations for PCM switch-based circuit and system applications.

For agenda and additional details - Click here >
Monday, June 20 - as part of WMH: RF Large-Signal Transistor Performance Limits Related to Reliability and Ruggedness in Mobile Circuit Applications
Dr. Samir Chaudhry

Abstract:
The demand for silicon-based PA technology has grown with the rapid growth of popular wireless applications such as 5G, WiFi, NFC, GPS, IoT and Bluetooth, coupled with the emergence of other analog markets such as smart energy and automotive. One of the key benefits of SiGe HBTs over CMOS is the ability to operate at higher voltages, necessitating careful and comprehensive characterization and modeling of the Safe Operating Area (SOA) in a HBT so robust ICs can be designed. The SOA of an HBT is typically limited by four phenomena: 1) Self/Mutual-heating where localized temperature increase due to power dissipation in the SiGe NPN can lead to thermal runaway and irreversible device degradation and/or destruction, 2) Avalanche breakdown at high Vce that is dependent on the base impedance and temperature, 3) Beta degradation, which is a long-term reliability limit and manifests itself as a reduction in current gain (Beta) of the SiGe NPN due to an increase in the non-ideal (low Vbe) base current, and 4) the EM (Electromigration) limit of the interconnect leading into the SiGe NPN. In this tutorial, the characterization, modeling and PDK implementation of the above SiGe NPN SOA phenomenon will be presented with a goal of providing foundry validated and easy to use design verification tools for BiCMOS design teams that minimize the dependence on manual load-line based techniques that may have been traditionally used, and at the same time enabling rapid iteration between design and verification. A SiGe BiCMOS RF IC design will be used to highlight key features of this verification flow. Finally, future needs and enhancements will be discussed.

For agenda and additional details - Click here >
Tuesday, June 21, 2022 at 11:30am

Cadence booth #5050
RF and mmWave IC Design Solutions for Cadence tools on Tower’s SiGe BiCMOS and RF SOI technologies
Dr. Samir Chaudhry
ECOC 2022
September 18 - 22, 2022
Messe Basel
Switzerland
Booth: #377
SNUG Israel 2022
September 20, 2022
Presentation Only - TBD