Automotive Excellence – From Design to Volume Production
March 24, 2021
March 24, 2021 |
* Login links are accessible 15 minutes prior to event’s scheduled time for registered guests only.
Engineers developing IC solutions for the exciting automotive market are no strangers to making constant trade-offs between ever increasing performance levels and one of the strictest reliability and quality requirements. Tower’s industry leading analog technologies, with its best-in-class design enablement capabilities, are already popular with the designers in RF, high-performance analog, power management and sensor applications. Tower’s automotive foundry program complements this rich suite of technologies by providing a full-circle framework and methodology to deliver the highest quality and reliability requirements for this rapidly evolving automotive market.
In the first part of this webinar, we will demonstrate how industry specifications for automotive mass production from the foundry perspective translate into Tower’s world-class quality system and methodologies implemented on the production floor. We will articulate guidelines for physical and environmental mission-profile reliability qualification success criteria that are distinct from non-automotive products. Through several examples / case studies we will present our Automotive Quality Policy and in-field implementation including, for example, the zero-defect mentality methodology, Maverick Alert System, and other capabilities.
In the second part, we will show case the design enablement capabilities that allows designing robust products before they hit the production floor. As the number of electronic components in automobiles increases exponentially, it becomes necessary to introduce robustness and manufacturability criteria in the design itself. Therefore, the PDKs must be augmented to include delicate, analog/automotive layout checks for symmetry, matching, and alignment, and ensure that layout follows design constrains as defined in schematics. Tower provides its customers an automated way of checking those constrains using an enhanced PDK and by running Calibre PERC. Using Band gap reference design with several hierarchy levels, we demonstrate a complete flow starting with defining constraints either on the schematic or layout, running the Calibre PERC and then verifying the results in the layout.
For more information and further details, please contact us:
Dr. Amol Kalburge
Senior Director RF & HPA Strategic Marketing
Dr. Amol M Kalburge serves as Sr. Director of Strategic Marketing for TowerJazz and Head of the Automotive Program. He has held various positions of increasing responsibility at TowerJazz Semiconductor, including Director of Process and R&D Engineering and Manager of Device Technology.
Prior to Jazz, Dr. Kalburge served as Vice President of Process Engineering at RF Nano Corp – a nanotech start-up, and was a Sr. Manager at PRTM Consultants (now PwC) where he consulted for global semiconductor leaders.
Dr. Kalburge received a Ph.D. and M.S. from the University of Southern California, Los Angeles, and a B.Tech. from the Indian Institute of Technology, Bombay.
He holds twenty-seven patents and has published several journal articles.
Dr. Eitan Shauly
Eitan N. Shauly received the B.Sc. degree in materials engineering from Ben-Gurion University, Beer-Sheva, Israel, in 1989, and M.Sc. and Ph.D. degrees in materials engineering from the Technicon — Institute of Technology, Haifa, in 1995 and 2001, respectively. He has worked for Tower Semiconductor since 1989. During 1989–1994 he was a diffusion and ion implantation engineer. During 1994–1997 he was a device/Integration engineer, focusing on process integration and process modeling. Since 1998 he is doing integration, focusing on platform development, design rules, Design-for-Manufacturing and Automotive.
Managing Director, CAD and Design Support
Ofer joined Tower Semiconductor in 2001 in parallel to the new Fab II building. Ofer first role was to build the Design Enablement team that would serve the existing and the new fab processes. Ofer has more than 30 years of experience in the Design Enablement and CAD from companies like National Semi., DSPG and Intrixsix. Ofer is well known in the WW EDA community and often present in Tower’s , DAC as well as EDA conferences as CDNLine, Mentor U2U and Synopsys SNUG. Ofer Has master’s in mathematics and Computer Science from Beer Sheva University.