Enabling Tower’s leading-edge BCD and RF technologies with Mentor Design Tools
The custom IC design tools from Mentor are ideally suited for analog IC design for BCD and RF applications and have enabled design teams to design from a single cockpit from schematic to tape-out. Tower has partnered with Mentor to provide our mutual customers a truly differentiated design environment. In this webinar, we’ll present an overview of the collaboration between Tower and Mentor with examples of both high-voltage and high-frequency design tools such as Tanner, AFS simulations, Calibre PERC and xRC highlighting their use for simulation, layout synthesis and best-in-class verification for high-yielding, high-performance and high-reliability ICs
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PRESENTED BY
Dr. Samir Chaudhry
Director of Design Enablement, Tower Semiconductor
Mr. Ofer Tamir
Managing Director, CAD and Design Support, Tower Semiconductor
Ofer joined Tower Semiconductor in 2001 in parallel to the new Fab II building. Ofer first role was to build the Design Enablement team that would serve the existing and the new fab processes. Ofer has more than 30 years of experience in the Design Enablement and CAD from companies like National Semi., DSPG and Intrixsix. Ofer is well known in the WW EDA community and often present in Tower’s , DAC as well as EDA conferences as CDNLine, Mentor U2U and Synopsys SNUG. Ofer Has master’s in mathematics and Computer Science from Beer Sheva University.
Mr. John Stabenow
Director of Product Engineering at Mentor
John Stabenow is Director of Product Engineering and currently manages the worldwide Tanner Product Engineering Team and is also part of the Tanner Strategy team. He has over 30 years of experience in analog and custom design. Originally starting in design, Mr. Stabenow worked at a number of IC companies including Micro Linear, Information Storage Devices, and National Semiconductor. Since 1997, Mr. Stabenow has worked in a variety of roles in the EDA industry, working at Cadence and Synopsys before joining Mentor in 2016.