RF-SOI & RF-CMOS Platforms
Low Ron-Coff, highly linear, feature-rich platforms to enable the highest performance 4G/LTE and 5G front-end module (FEM) products
The Tower Semiconductor RF-SOI process family combines a 3–7 metal layer CMOS process with options for 1.2, 2.5V, and 5V transistors. The technology offering, with three generations in high volume manufacturing, is further enhanced by silicon proven accurate models and design libraries, and world-class design enablement.
These processes are well-suited for products requiring isolation such as cellular switches. Excellent channel isolation better than >40 dB, insertion loss of <0.35 dB, low harmonics of better than 105dBc at cellular power levels and inter-modulation distortion below -117 dBm have been demonstrated. Low noise amplifiers can also be integrated with specialized low-noise, high-gain, high-linearity devices and low-loss inductors realized with thick Cu or Al layers.
In addition to the active devices, process options include silicided and unsilicided poly resistors, RF metal-insulator-metal (MIM) capacitors, metal-fringe capacitors (MFCs), scalable geometry inductors, fixed geometry inductors, fixed geometry baluns, and transformers.
Substrate options include “thin-film” for the best Ron-Coff performance and “thick-film” for bulk-like behavior of the active MOSFETs, free of floating body effects.
Circuit designers new to the platform may draw upon a rich library of characterized demonstration IP and reference flows.
The platform is supported by our Multi-Project Wafer shuttle program for fast prototyping.
- Sub-100fs Ron-Coff 2.5V NMOS
- Specialized devices for LNA integration
- High density (4fF/µm2) and high voltage (>25V) MIM capacitors. High-linearity metal fringe capacitors
- Low value and high value resistors, RF varactor, High-Q inductors
- High impedance, highly linear SOI substrate
- BSIM4 SOI, PSP and HiSIM SOI models
- Al or Cu low RC metallization
- Support for 1.2, 2.5, or 5V
- High utilization standard cell library
- High power handling devices for switch stack size reduction
- Highly accurate RF device models and fast parasitic extraction for wire bond or flipped die assembly
- Advanced substrate models